Technical Program

Paper Detail

Paper:	DISPS-P3.10
Session:	Design and Mapping Techniques for DSP Systems
Time:	Friday, May 19, 16:30 - 18:30
Presentation:	Poster
Topic:	Design and Implementation of Signal Processing Systems: Hardware, Software, and Algorithm Tradeoffs and Integration
Title:	SPIRAL: JOINT RUNTIME AND ENERGY OPTIMIZATION OF LINEAR TRANSFORMS
Authors:	Marek Telgarsky, James C. Hoe, José M. F. Moura, Carnegie Mellon University, United States
Abstract:	There is much interest into joint runtime and energy optimization of implementations of signal processing algorithms. Applications in domains such as embedded computing, sensor networks, and mobile communications often require processing of signals under simultaneous runtime, energy and/or power constraints. Hence, in addition to runtime, power and energy are first-order design considerations for both hardware and software developers in those domains. This paper studies the automatic generation of software implementations of digital signal processing (DSP) transforms that are optimized with respect to both runtime and energy. We explore the impact of algorithm selection (a software technique) and voltage-frequency scaling (a hardware technique) on the runtime and energy of computing fast linear transforms. We use SPIRAL, a code generation system, to enumerate automatically many alternative algorithms for the discrete Fourier transform. We measure the runtime and energy of these algorithms at different voltage-frequency settings of an Intel Pentium M microprocessor. We report experimental results supporting that algorithm selection and voltage-frequency scaling do achieve the following: (1) have large impact on the runtime and energy of computing the discrete Fourier transform on a microprocessor; and (2) enable the optimization of important joint runtime-energy objectives.