ICASSP 2006 - May 15-19, 2006 - Toulouse, France

Technical Program

Paper Detail

Paper:SLP-P18.10
Session:LVCSR Systems
Time:Friday, May 19, 10:00 - 12:00
Presentation: Poster
Topic: Speech and Spoken Language Processing: Decoding algorithms and implementation
Title: A Decoder For LVCSR Based On Fixed-Point Arithmetic
Authors: Enrico Bocchieri, Doug Blewett, AT&T Labs – Research, United States
Abstract: The increasing computational power of embedded CPU's motivates the fixed-point implementation of highly accurate large-vocabulary continuous-speech (LVCSR) algorithms, to achieve the same performance on the device as on the server. We report on methods for the fixed-point implementation of the frame-synchronous beam-search Viterbi decoder, HMM likelihood computation, and N-grams language models. Our fixed-point recognizer is as accurate as the floating-point recognizer in several LVCSR experiments on the DARPA Switchboard and on an AT&T proprietary task. We also present results on the DARPA Resource Management task using the 206 MHz StrongARM-1100 CPU, where the fixed-point implementation enables real-time performance: the floating-point recognizer (with floating-point software emulation) is 50 times slower, for the same accuracy.



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