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Technical Program

Paper Detail

Paper:	DISPS-L2.5
Session:	Efficient implementations of Communications and Coding Applications
Time:	Friday, May 19, 15:20 - 15:40
Presentation:	Lecture
Topic:	Design and Implementation of Signal Processing Systems: Custom Processors, Architectures, and VLSI Hardware
Title:	Aggregated Circulant Matrix based LDPC Codes
Authors:	Yuming Zhu, Chaitali Chakrabarti, Arizona State University, United States
Abstract:	This paper presents a variation of circulant matrix based LDPC codes which allows more than one circulant identity matrix in a submatrix of the parity check matrix. The aggregated LDPC supports higher decoding throughput with small increase in datapath complexity. The construction algorithm, bit error rate (BER) performance, information update rule and the architecture for high decoding throughput are also presented.