ICASSP 2006 - May 15-19, 2006 - Toulouse, France

Technical Program

Paper Detail

Paper:ITT-P2.8
Session:Emerging DSP Applications
Time:Thursday, May 18, 10:00 - 12:00
Presentation: Poster
Topic: Industry Technology Track: Power Systems and Motor Controls
Title: Analysis and Design of Voltage Regulator with Improved Light Load Efficiency
Authors: Jaber Abu Qahouq, Lilly Huang, Intel Corporation, United States
Abstract: A Voltage Regulator (VR) design with improved efficiency especially at light load and with good steady-state ripple and dynamic performance is discussed in this paper. The presented VR utilizes a proposed “Pulse-Sliding*” load adaptive control scheme to satisfy the VR requirements. Such VR design is important in many applications including those that are battery powered and has energy consumption constrains. In this paper, the concept, design, analysis, simulation and experimental circuit of the improved VR design are presented.



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