ICASSP 2006 - May 15-19, 2006 - Toulouse, France

Technical Program

Paper Detail

Paper:DISPS-P2.7
Session:Hardware and Software Implementations of DSP Systems
Time:Thursday, May 18, 16:30 - 18:30
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Fast Algorithms
Title: Hardware Operator for Simultaneous Sine and Cosine Evaluation
Authors: Arnaud Tisserand, LIRMM, CNRS - Univ. Montpellier II, France
Abstract: This work deals with hardware evaluation of the sine and cosine functions for the same argument simultaneously. The proposed method uses trigonometric identities, small lookup tables and low-degree polynomial approximations with very sparse coefficients. Most of the multiplications are replaced by a small number of additions or subtractions. It leads to fast and small architectures for digital-signal or image processing applications.



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