ICASSP 2006 - May 15-19, 2006 - Toulouse, France

Technical Program

Paper Detail

Paper:DISPS-P3.3
Session:Design and Mapping Techniques for DSP Systems
Time:Friday, May 19, 16:30 - 18:30
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Hardware, Software, and Algorithm Tradeoffs and Integration
Title: Custom-Made Design of a Digital PID Control System
Authors: Francisco Fons, Mariano Fons, Enrique Cantó, Rovira i Virgili University, Spain
Abstract: In the field of real-time signal processing, like most of automatic control systems nowadays present at the industry and focused on PID (Proportional-Integral-Derivative) controllers, it is common to find software-oriented solutions based on powerful 32-bit DSP, RISC or CISC processors. This work deals with the hardware/software co-design of a PID coprocessor, all embedded on a system-on-chip device. The performances reached by a platform composed of an 8-bit MCU and a dynamically reconfigurable FPGA allow scheduling the PID algorithm as a set of tasks executed by both devices concurrently. Moreover, thanks to the flexible hardware characteristics, some modules synthesized into the FPGA are reconfigured at run-time while the rest keeps on active. This cost-effective approach, encouraged by its parallelism, is an alternative to commercial -both general-purpose and specific-purpose- processors in whatever made-to-measure engineering application.



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