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Technical Program

Paper Detail

Paper:	DISPS-P1.2
Session:	VLSI Architectures and Algorithms for Image and Video Processing
Time:	Tuesday, May 16, 14:00 - 16:00
Presentation:	Poster
Topic:	Design and Implementation of Signal Processing Systems: Hardware for Image and Video Coding
Title:	OPTIMIZATION AND IMPLEMENTATION ON FPGA OF THE DCT/IDCT ALGORITHM
Authors:	Ahmed Ben atitallah, Patrice Kadionik, IXL-ENSEIRB, France; Fahmi Ghozzi, LETI-ENIS, Tunisia; Patrice Nouel, IXL-ENSEIRB, France; Nouri Masmoudi, LETI-ENIS, Tunisia; Philippe Marchegay, IXL-ENSEIRB, France
Abstract:	In this paper, we present a comparison between two methods, the modified Loeffler algorithm (11 MUL and 29 ADD) and Distributed Arithmetic, to implement the DCT/IDCT algorithm for MPEG or H.26x video compression using VHDL description language. The implementation has been achieved on Altera Stratix EP1S10 FPGA which provides a dedicated DSP blocks required for common signal processing functions. A new solution based on this DSP blocks used for to implement multipliers for the modified Loeffler algorithm in order to optimize speed and area.