| Paper: | DISPS-L2.2 | ||
| Session: | Efficient implementations of Communications and Coding Applications | ||
| Time: | Friday, May 19, 14:20 - 14:40 | ||
| Presentation: | Lecture | ||
| Topic: | Design and Implementation of Signal Processing Systems: Custom Processors, Architectures, and VLSI Hardware | ||
| Title: | A Parallel Processing Hardware Architecture for Elliptic Curve Cryptosystems | ||
| Authors: | Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingrid Verbauwhede, Katholieke Universiteit Leuven, Belgium | ||
| Abstract: | We propose a parallel processing crypto-processor for Elliptic Curve Cryptography (ECC). The processor consists of a controller that dynamically checks an instruction-level parallelism (ILP) and multiple sets of modular arithmetic logic units accelerating modular operations. A case study of HW design with the proposed architecture shows that EC point multiplication over GF(p) and GF(2^m) can be improved by a factor of 1.6 compared to the case of using single processing element. | ||
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